Fan-out (RDL)

Fan-Out packaging and its core technology, RDL （Redistribution Layer）, have been a significant breakthrough in advanced packaging in recent years. By creating additional routing areas around the chip, it overcomes the limitation of I/O counts by chip area and achieves higher interconnect density. Fan-out RDL is particularly well-suited for heterogeneous integration of logic chips, memory chips, and RF chips, becoming a core technology for applications such as mobile devices, AI, high-performance computing (HPC), and 5G.​​​

The Fan-Out process faces multiple challenges: wafer warpage and die shift affect packaging accuracy; RDL line width and line spacing (L/S) shrink to micron or even submicron levels, placing high demands on photolithography and metal deposition; multi-wafer integration introduces material and structural differences; and dielectric layer bubbles and hidden defects increase detection difficulties.​​​

CMIt's products and equipment are specifically designed for Fan-out packaging. Combining brightfield, darkfield, and TLI optical designs, they accurately detect open circuits, short circuits, uneven line widths, and particle defects. They also conduct multi-layer RDL perspective inspections to identify hidden defects in the dielectric layer. Final visual inspection (FVI) confirms solder ball and package edge quality, ensuring overall package reliability and mass production efficiency.​